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  1 1 1/12/01 supertex inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. no responsibility is assumed for possible omissions or inaccuracies. circuitry and specifications are subject to c hange without notice. for the latest product specifications, refer to the supertex website: http://www.supertex.com. for complete liability information on all supertex products, refer to the most curre nt databook or to the legal/disclaimer page on the supertex website. bv dss /r ds(on) v gs(th) i d(on) bv dgs (max) (max) (min) to-92 350v 15 ? 1.8v 0.15a vn3515l 400v 12 ? 1.8v 0.15a VN4012L advanced dmos technology these enhancement-mode (normally-off) transistors utilize a vertical dmos structure and supertex's well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inher- ent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. supertex? vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. ordering information order number / package vn3515l VN4012L applications ? motor controls ? converters ? amplifiers ? telecom switching ? power supply circuits ? drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) n-channel enhancement-mode v ertical dmos fets package option note: see package outline section for dimensions. t o-92 features ? free from secondary breakdown ? low power drive requirement ? ease of paralleling ? low c iss and fast switching speeds ? excellent thermal stability ? integral source-drain diode ? high input impedance and high gain ? complementary n- and p-channel devices absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds. s g d
2 1235 bordeaux drive, sunnyvale, ca 94089 tel: (408) 744-0100 ?fax: (408) 222-4895 www.supertex.com 1 1/12/01 ?001 supertex inc. all rights reserved. unauthorized use or reproduction prohibited. package i d (continuous)* i d (pulsed) power dissipation jc ja i dr *i drm @ t c = 25 c c/w c/w vn3515l (to-92) 150ma 600ma 1w 125 170 150ma 600ma VN4012L (to-92) 160ma 650ma 1w 125 170 160ma 650ma * i d (continuous) is limited by max rated t j . vn3515l/VN4012L thermal characteristics symbol parameter min typ max unit conditions bv dss vn3515 350 vn4012 400 v gs(th) gate threshold voltage 0.6 1.8 v v gs = v ds , i d = 1ma i gss gate body leakage 10 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 1 v gs = 0v, v ds = 0.8 max rating 100 av gs = 0v, v ds = 0.8 max rating t a = 125 c i d(on) on-state drain current 0.15 0.3 a v ds = 10v, v gs = 4.5v 9.5 15 v gs = 4.5v, i d = 100ma 17 35 v gs = 4.5v, i d = 100ma, ta = 125 c 9.5 12 v gs = 4.5v, i d = 100ma 17 30 v gs = 4.5v, i d = 100ma, ta = 125 c g fs forward transconductance 125 350 m v ds =15v, i d = 100ma c iss input capacitance 110 c oss common source output capacitance 30 pf c rss reverse transfer capacitance 10 t d(on) turn-on delay time 20 t r rise time 20 t d(off) turn-off delay time 65 t f fall time 65 v sd diode forward voltage drop 1.2 v v gs = 0v, i sd = 160ma notes: 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. 3. see tn2540 data sheet for characteristic curves. drain-to-source breakdown voltage vv gs = 0v, i d = 100 a static drain-to-source on-state resistance r ds(on) vn3515 vn4012 switching waveforms and test circuit ? electrical characteristics (@ 25 c unless otherwise specified) ns v ds = 25v, v gs = 0v f = 1mhz v dd = 25v i d = 100ma r gen = 25 ? 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v ?


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